quartus全部引脚锁定.doc

上传人:美****子 文档编号:57976341 上传时间:2022-11-06 格式:DOC 页数:59 大小:512KB
返回 下载 相关 举报
quartus全部引脚锁定.doc_第1页
第1页 / 共59页
quartus全部引脚锁定.doc_第2页
第2页 / 共59页
点击查看更多>>
资源描述

《quartus全部引脚锁定.doc》由会员分享,可在线阅读,更多相关《quartus全部引脚锁定.doc(59页珍藏版)》请在得力文库 - 分享文档赚钱的网站上搜索。

1、附录 DE2-115实验板引脚配置信息DE2-115开发板:目标芯片Cyclone IV E EP4CE115F29C7;存储器64MB x2 SDRAM、2MB SRAM、8MB Flash;通信端口:时钟:50MHz x3 振荡器、SMA in/out Altera 配置芯片 EPCS64表 1 拨动开关引脚配置Signal NameFPGA Pin No.DescriptionI/O StandardSW0 PIN_AB28Slide Switch0Depending on JP7SW1PIN_AC28Slide Switch1Depending on JP7SW2PIN_AC27Sli

2、de Switch2Depending on JP7SW3PIN_AD27Slide Switch3Depending on JP7SW4PIN_AB27Slide Switch4Depending on JP7SW5PIN_AC26Slide Switch5Depending on JP7SW6PIN_AD26Slide Switch6Depending on JP7SW7PIN_AB26Slide Switch7Depending on JP7SW8PIN_AC25Slide Switch8Depending on JP7SW9PIN_AB25Slide Switch9Depending

3、on JP7SW10PIN_AC24Slide Switch10Depending on JP7SW11PIN_AB24Slide Switch11Depending on JP7SW12PIN_AB23Slide Switch12Depending on JP7SW13PIN_AA24Slide Switch13Depending on JP7SW14PIN_AA23Slide Switch14Depending on JP7SW15PIN_AA22Slide Switch15Depending on JP7SW16PIN_Y24Slide Switch16Depending on JP7S

4、W17PIN_Y23Slide Switch17Depending on JP7表 2 按钮开关引脚配置Signal NameFPGA Pin No.DescriptionI/O StandardKEY0PIN_M23Push-button0Depending on JP7KEY1PIN_M21Push-button1Depending on JP7KEY2PIN_N21Push-button2Depending on JP7KEY3PIN_R24Push-button3Depending on JP7表 3 LED 引脚配置Signal NameFPGA Pin No.Description

5、I/OStandardLEDR0PIN_G19LED Red0LEDR1PIN_F19LED Red1LEDR2PIN_E19LED Red2LEDR3PIN_F21LED Red3LEDR4PIN_F18LED Red4LEDR5PIN_E18LED Red5LEDR6PIN_J19LED Red6LEDR7PIN_H19LED Red7LEDR8PIN_J17LED Red8LEDR9PIN_G17LED Red9LEDR10PIN_J15LED Red10LEDR11PIN_H16LED Red11LEDR12PIN_J16LED Red12LEDR13PIN_H17LED Red13L

6、EDR14PIN_F15LED Red14LEDR15PIN_G15LED Red15LEDR16PIN_G16LED Red16LEDR17PIN_H15LED Red17LEDG0PIN_E21LED Green0LEDG1PIN_E22LED Green1LEDG2PIN_E25LED Green2LEDG3PIN_E24LED Green3LEDG4PIN_H21LED Green4LEDG5PIN_G20LED Green5LEDG6PIN_G22LED Green6LEDG7PIN_G21LED Green7LEDG8PIN_F17LED Green8表 4 七段数码管引脚配置Si

7、gnal NameFPGA Pin No.DescriptionI/O StandardHEX00PIN_G18Seven Segment Digit 00HEX01PIN_F22Seven Segment Digit 01HEX02PIN_E17Seven Segment Digit 02HEX03PIN_L26Seven Segment Digit 03Depending on JP7HEX04PIN_L25Seven Segment Digit 04Depending on JP7HEX05PIN_J22Seven Segment Digit 05Depending on JP7HEX0

8、6PIN_H22Seven Segment Digit 06Depending on JP7HEX10PIN_M24Seven Segment Digit 10Depending on JP7HEX11PIN_Y22Seven Segment Digit 11Depending on JP7HEX12PIN_W21Seven Segment Digit 12Depending on JP7HEX13PIN_W22Seven Segment Digit 13Depending on JP7HEX14PIN_W25Seven Segment Digit 14Depending on JP7HEX1

9、5PIN_U23Seven Segment Digit 15Depending on JP7HEX16PIN_U24Seven Segment Digit 16Depending on JP7HEX20PIN_AA25Seven Segment Digit 20Depending on JP7HEX21PIN_AA26Seven Segment Digit 21Depending on JP7HEX22PIN_Y25Seven Segment Digit 22Depending on JP7HEX23PIN_W26Seven Segment Digit 23Depending on JP7HE

10、X24PIN_Y26Seven Segment Digit 24Depending on JP7HEX25PIN_W27Seven Segment Digit 25Depending on JP7HEX26PIN_W28Seven Segment Digit 26Depending on JP7HEX30PIN_V21Seven Segment Digit 30Depending on JP7HEX31PIN_U21Seven Segment Digit 31Depending on JP7HEX32PIN_AB20Seven Segment Digit 32Depending on JP6H

11、EX33PIN_AA21Seven Segment Digit 33Depending on JP6HEX34PIN_AD24Seven Segment Digit 34Depending on JP6HEX35PIN_AF23Seven Segment Digit 35Depending on JP6HEX36PIN_Y19Seven Segment Digit 36Depending on JP6HEX40PIN_AB19Seven Segment Digit 40Depending on JP6HEX41PIN_AA19Seven Segment Digit 41Depending on

12、 JP6HEX42PIN_AG21Seven Segment Digit 42Depending on JP6HEX43PIN_AH21Seven Segment Digit 43Depending on JP6HEX44PIN_AE19Seven Segment Digit 44Depending on JP6HEX45PIN_AF19Seven Segment Digit 45Depending on JP6HEX46PIN_AE18Seven Segment Digit 46Depending on JP6HEX50PIN_AD18Seven Segment Digit 50Depend

13、ing on JP6HEX51PIN_AC18Seven Segment Digit 51Depending on JP6HEX52PIN_AB18Seven Segment Digit 52Depending on JP6HEX53PIN_AH19Seven Segment Digit 53Depending on JP6HEX54PIN_AG19Seven Segment Digit 54Depending on JP6HEX55PIN_AF18Seven Segment Digit 55Depending on JP6HEX56PIN_AH18Seven Segment Digit 56

14、Depending on JP6HEX60PIN_AA17Seven Segment Digit 60Depending on JP6HEX61PIN_AB16Seven Segment Digit 61Depending on JP6HEX62PIN_AA16Seven Segment Digit 62Depending on JP6HEX63PIN_AB17Seven Segment Digit 63Depending on JP6HEX64PIN_AB15Seven Segment Digit 64Depending on JP6HEX65PIN_AA15Seven Segment Di

15、git 65Depending on JP6HEX66PIN_AC17Seven Segment Digit 66Depending on JP6HEX70PIN_AD17Seven Segment Digit 70Depending on JP6HEX71PIN_AE17Seven Segment Digit 71Depending on JP6HEX72PIN_AG17Seven Segment Digit 72Depending on JP6HEX73PIN_AH17Seven Segment Digit 73Depending on JP6HEX74PIN_AF17Seven Segm

16、ent Digit 74Depending on JP6HEX75PIN_AG18Seven Segment Digit 75Depending on JP6HEX76PIN_AA14Seven Segment Digit 76表 5 时钟信号引脚配置信息Signal NameFPGA Pin No.DescriptionI/O StandardCLOCK_50PIN_Y250 MHz clock inputCLOCK2_50PIN_AG1450 MHz clock inputCLOCK3_50PIN_AG1550 MHz clock inputDepending on JP6SMA_CLKO

17、UTPIN_AE23External (SMA) clock outputDepending on JP6SMA_CLKINPIN_AH14External (SMA) clock input表 6 LCD 模块引脚配置Signal NameFPGAPinNo.DescriptionI/OLCD_DATA7PIN_M5LCD Data7StandardLCD_DATA6PIN_M3LCD Data6LCD_DATA5PIN_K2LCD Data5LCD_DATA4PIN_K1LCD Data4LCD_DATA3PIN_K7LCD Data3LCD_DATA2PIN_L2LCD Data2LCD

18、_DATA1PIN_L1LCD Data1LCD_DATA0PIN_L3LCD Data0LCD_ENPIN_L4LCD EnableLCD_RWPIN_M1LCD Read/Write Select, 0 = Write, 1 = ReadLCD_RSPIN_M2LCD Command/Data Select, 0 = Command, 1 = DataLCD_ONPIN_L5LCD Power ON/OFFLCD_BLONPIN_L6LCD Back Light ON/OFF表 7 HSMC 接口引脚配置Signal NameFPGA Pin No.DescriptionI/O Stand

19、ardHSMC_CLKIN0PIN_AH15Dedicated clock inputDepending on JP6HSMC_CLKIN_N1PIN_J28LVDS RX or CMOS I/O or differential clock inputDepending on JP7HSMC_CLKIN_N2PIN_Y28LVDS RX or CMOS I/O or differential clock inputDepending on JP7HSMC_CLKIN_P1PIN_J27LVDS RX or CMOS I/O or differential clock inputDependin

20、g on JP7HSMC_CLKIN_P2PIN_Y27LVDS RX or CMOS I/O or differential clock inputDepending on JP7HSMC_CLKOUT0PIN_AD28Dedicated clock outputDepending on JP7HSMC_CLKOUT_N1 PIN_G24LVDS TX or CMOS I/O or differential clock input/outputDepending on JP7HSMC_CLKOUT_N2 PIN_V24LVDS TX or CMOS I/O or differential c

21、lock input/outputDepending on JP7HSMC_CLKOUT_P1 PIN_G23LVDS TX or CMOS I/O or differential clock input/outputDepending on JP7HSMC_CLKOUT_P2 PIN_V23LVDS TX or CMOS I/O or differential clock input/outputDepending on JP7HSMC_D0PIN_AE26LVDS TX or CMOS I/O Depending on JP7HSMC_D1PIN_AE28LVDS TX or CMOS I

22、/O Depending on JP7HSMC_D2PIN_AE27LVDS TX or CMOS I/O Depending on JP7HSMC_D3PIN_AF27LVDS TX or CMOS I/O Depending on JP7HSMC_RX_D_N0PIN_F25LVDS RX bit 0n or CMOS I/ODepending on JP7HSMC_RX_D_N1PIN_C27LVDS RX bit 1n or CMOS I/ODepending on JP7HSMC_RX_D_N2PIN_E26LVDS RX bit 2n or CMOS I/ODepending on

23、 JP7HSMC_RX_D_N3PIN_G26LVDS RX bit 3n or CMOS I/ODepending on JP7HSMC_RX_D_N4PIN_H26LVDS RX bit 4n or CMOS I/ODepending on JP7HSMC_RX_D_N5PIN_K26LVDS RX bit 5n or CMOS I/ODepending on JP7HSMC_RX_D_N6PIN_L24LVDS RX bit 6n or CMOS I/ODepending on JP7HSMC_RX_D_N7PIN_M26LVDS RX bit 7n or CMOS I/ODependi

24、ng on JP7HSMC_RX_D_N8PIN_R26LVDS RX bit 8n or CMOS I/ODepending on JP7HSMC_RX_D_N9PIN_T26LVDS RX bit 9n or CMOS I/ODepending on JP7HSMC_RX_D_N10PIN_U26LVDS RX bit 10n or CMOS I/ODepending on JP7HSMC_RX_D_N11PIN_L22LVDS RX bit 11n or CMOS I/ODepending on JP7HSMC_RX_D_N12PIN_N26LVDS RX bit 12n or CMOS

25、 I/ODepending on JP7HSMC_RX_D_N13PIN_P26LVDS RX bit 13n or CMOS I/ODepending on JP7HSMC_RX_D_N14PIN_R21LVDS RX bit 14n or CMOS I/ODepending on JP7HSMC_RX_D_N15PIN_R23LVDS RX bit 15n or CMOS I/ODepending on JP7HSMC_RX_D_N16PIN_T22LVDS RX bit 16n or CMOS I/ODepending on JP7HSMC_RX_D_P0PIN_F24LVDS RX b

26、it 0 or CMOS I/ODepending on JP7HSMC_RX_D_P1PIN_D26LVDS RX bit 1 or CMOS I/ODepending on JP7HSMC_RX_D_P2PIN_F26LVDS RX bit 2 or CMOS I/ODepending on JP7HSMC_RX_D_P3PIN_G25LVDS RX bit 3 or CMOS I/ODepending on JP7HSMC_RX_D_P4PIN_H25LVDS RX bit 4 or CMOS I/ODepending on JP7HSMC_RX_D_P5PIN_K25LVDS RX b

27、it 5 or CMOS I/ODepending on JP7HSMC_RX_D_P6PIN_L23LVDS RX bit 6 or CMOS I/ODepending on JP7HSMC_RX_D_P7PIN_M25LVDS RX bit 7 or CMOS I/ODepending on JP7HSMC_RX_D_P8PIN_R25LVDS RX bit 8 or CMOS I/ODepending on JP7HSMC_RX_D_P9PIN_T25LVDS RX bit 9 or CMOS I/ODepending on JP7HSMC_RX_D_P10PIN_U25LVDS RX

28、bit 10 or CMOS I/ODepending on JP7HSMC_RX_D_P11PIN_L21LVDS RX bit 11 or CMOS I/ODepending on JP7HSMC_RX_D_P12PIN_N25LVDS RX bit 12 or CMOS I/ODepending on JP7HSMC_RX_D_P13PIN_P25LVDS RX bit 13 or CMOS I/ODepending on JP7HSMC_RX_D_P14PIN_P21LVDS RX bit 14 or CMOS I/ODepending on JP7HSMC_RX_D_P15PIN_R

29、22LVDS RX bit 15 or CMOS I/ODepending on JP7HSMC_RX_D_P16PIN_T21LVDS RX bit 16 or CMOS I/ODepending on JP7HSMC_TX_D_N0PIN_D28LVDS TX bit 0n or CMOS I/ODepending on JP7HSMC_TX_D_N1PIN_E28LVDS TX bit 1n or CMOS I/ODepending on JP7HSMC_TX_D_N2PIN_F28LVDS TX bit 2n or CMOS I/ODepending on JP7HSMC_TX_D_N

30、3PIN_G28LVDS TX bit 3n or CMOS I/ODepending on JP7HSMC_TX_D_N4PIN_K28LVDS TX bit 4n or CMOS I/ODepending on JP7HSMC_TX_D_N5PIN_M28LVDS TX bit 5n or CMOS I/ODepending on JP7HSMC_TX_D_N6PIN_K22LVDS TX bit 6n or CMOS I/ODepending on JP7HSMC_TX_D_N7PIN_H24LVDS TX bit 7n or CMOS I/ODepending on JP7HSMC_T

31、X_D_N8PIN_J24LVDS TX bit 8n or CMOS I/ODepending on JP7HSMC_TX_D_N9PIN_P28LVDS TX bit 9n or CMOS I/ODepending on JP7HSMC_TX_D_N10PIN_J26LVDS TX bit 10n or CMOS I/ODepending on JP7HSMC_TX_D_N11PIN_L28LVDS TX bit 11n or CMOS I/ODepending on JP7HSMC_TX_D_N12PIN_V26LVDS TX bit 12n or CMOS I/ODepending o

32、n JP7HSMC_TX_D_N13PIN_R28LVDS TX bit 13n or CMOS I/ODepending on JP7HSMC_TX_D_N14PIN_U28LVDS TX bit 14n or CMOS I/ODepending on JP7HSMC_TX_D_N15PIN_V28LVDS TX bit 15n or CMOS I/ODepending on JP7HSMC_TX_D_N16PIN_V22LVDS TX bit 16n or CMOS I/ODepending on JP7HSMC_TX_D_P0PIN_D27LVDS TX bit 0 or CMOS I/

33、ODepending on JP7HSMC_TX_D_P1PIN_E27LVDS TX bit 1 or CMOS I/ODepending on JP7HSMC_TX_D_P2PIN_F27LVDS TX bit 2 or CMOS I/ODepending on JP7HSMC_TX_D_P3PIN_G27LVDS TX bit 3 or CMOS I/ODepending on JP7HSMC_TX_D_P4PIN_K27LVDS TX bit 4 or CMOS I/ODepending on JP7HSMC_TX_D_P5PIN_M27LVDS TX bit 5 or CMOS I/

34、ODepending on JP7HSMC_TX_D_P6PIN_K21LVDS TX bit 6 or CMOS I/ODepending on JP7HSMC_TX_D_P7PIN_H23LVDS TX bit 7 or CMOS I/ODepending on JP7HSMC_TX_D_P8PIN_J23LVDS TX bit 8 or CMOS I/ODepending on JP7HSMC_TX_D_P9PIN_P27LVDS TX bit 9 or CMOS I/ODepending on JP7HSMC_TX_D_P10PIN_J25LVDS TX bit 10 or CMOS

35、I/ODepending on JP7HSMC_TX_D_P11PIN_L27LVDS TX bit 11 or CMOS I/ODepending on JP7HSMC_TX_D_P12PIN_V25LVDS TX bit 12 or CMOS I/ODepending on JP7HSMC_TX_D_P13PIN_R27LVDS TX bit 13 or CMOS I/ODepending on JP7HSMC_TX_D_P14PIN_U27LVDS TX bit 14 or CMOS I/ODepending on JP7HSMC_TX_D_P15PIN_V27LVDS TX bit 1

36、5 or CMOS I/ODepending on JP7HSMC_TX_D_P16PIN_U22LVDS TX bit 16 or CMOS I/ODepending on JP7表 8 GPIO 引脚配置信息 Signal NameFPGA Pin No.DescriptionI/O StandardGPIO0PIN_AB22GPIO Connection DATA0Depending on JP6GPIO1PIN_AC15GPIO Connection DATA1Depending on JP6GPIO2PIN_AB21GPIO Connection DATA2Depending on

37、JP6GPIO3PIN_Y17GPIO Connection DATA3Depending on JP6GPIO4PIN_AC21GPIO Connection DATA4Depending on JP6GPIO5PIN_Y16GPIO Connection DATA5Depending on JP6GPIO6PIN_AD21GPIO Connection DATA6Depending on JP6GPIO7PIN_AE16GPIO Connection DATA7Depending on JP6GPIO8PIN_AD15GPIO Connection DATA8Depending on JP

38、6GPIO9PIN_AE15GPIO Connection DATA9Depending on JP6GPIO10PIN_AC19GPIO Connection DATA10Depending on JP6GPIO11PIN_AF16GPIO Connection DATA11Depending on JP6GPIO12PIN_AD19GPIO Connection DATA12Depending on JP6GPIO13PIN_AF15GPIO Connection DATA13Depending on JP6GPIO14PIN_AF24GPIO Connection DATA14Depen

39、ding on JP6GPIO15PIN_AE21GPIO Connection DATA15Depending on JP6GPIO16PIN_AF25GPIO Connection DATA16Depending on JP6GPIO17PIN_AC22GPIO Connection DATA17Depending on JP6GPIO18PIN_AE22GPIO Connection DATA18Depending on JP6GPIO19PIN_AF21GPIO Connection DATA19Depending on JP6GPIO20PIN_AF22GPIO Connection

40、 DATA20Depending on JP6GPIO21PIN_AD22GPIO Connection DATA21Depending on JP6GPIO22PIN_AG25GPIO Connection DATA22Depending on JP6GPIO23PIN_AD25GPIO Connection DATA23Depending on JP6GPIO24PIN_AH25GPIO Connection DATA24Depending on JP6GPIO25PIN_AE25GPIO Connection DATA25Depending on JP6GPIO26PIN_AG22GPIO Connection DATA26Depending on JP6GPIO27PIN_AE24GPIO Connection DATA27Depending on JP6GPIO28PIN_AH22GPIO Connection DATA28Depending on JP6GPIO29PIN_AF26GPIO Connection DATA29Depending on JP6GPIO30PIN_AE20GPIO Connection DATA30Depending on JP6GPIO31PIN_AG23GPIO Connecti

展开阅读全文
相关资源
相关搜索

当前位置:首页 > 应用文书 > 文案大全

本站为文档C TO C交易模式,本站只提供存储空间、用户上传的文档直接被用户下载,本站只是中间服务平台,本站所有文档下载所得的收益归上传人(含作者)所有。本站仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。若文档所含内容侵犯了您的版权或隐私,请立即通知得利文库网,我们立即给予删除!客服QQ:136780468 微信:18945177775 电话:18904686070

工信部备案号:黑ICP备15003705号-8 |  经营许可证:黑B2-20190332号 |   黑公网安备:91230400333293403D

© 2020-2023 www.deliwenku.com 得利文库. All Rights Reserved 黑龙江转换宝科技有限公司 

黑龙江省互联网违法和不良信息举报
举报电话:0468-3380021 邮箱:hgswwxb@163.com