MCS-51系列单片机中英文资料对照外文翻译文献综述(共14页).doc

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1、精选优质文档-倾情为你奉上MCS-51系列单片机中英文资料对照外文翻译文献综述Structure and function of the MCS-51 seriesStructure and function of the MCS-51 series one-chip computer MCS-51 is a name of a piece of one-chip computer series which Intel Company produces. This company introduced 8 top-grade one-chip computers of MCS-51 serie

2、s in 1980 after introducing 8 one-chip computers of MCS-48 series in 1976. It belong to a lot of kinds this line of one-chip computer the chips have, such as 8051, 8031, 8751, 80C51BH, 80C31BH,etc., their basic composition, basic performance and instruction system are all the same.8051 daily represe

3、ntatives-51 serial one-chip computers.A one-chip computer system is made up of several following parts: (1) One microprocessor of 8 (CPU). ( 2) At slice data memory RAM (128B/256B),it use not depositing not can reading /data that write, such as result not middle of operation, final result and data w

4、anted to show, etc. (3) Procedure memory ROM/EPROM (4KB/8KB ), is used to preserve the procedure , some initial data and form in slice. But does not take ROM/EPROM within some one-chip computers, such as 8031, 8032.(4) Four 8 run side by side I/O interface P0 four P3, each mouth can use as introduct

5、ion , may use as exporting too. (5) Two timer / counter, each timer / counter may set up and count in the way, used to count to the external incident, can set up into a timing way too, and can according to count or result of timing realize the control of the computer. (6) Five cut off cutting off th

6、e control system of the source. (7) One all duplex serial I/O mouth of UART (universal asynchronous receiver/transmitter (UART) ), is it realize one-chip computer or one-chip computer and serial communication of computer to use for. (8) Stretch oscillator and clock produce circuit, quartz crystal fi

7、nely tune electric capacity need outer. Allow oscillation frequency as 12 megahertz now at most. Every the above-mentioned part was joined through the inside data bus .Among them, CPU is a core of the one-chip computer, it is the control of the computer and command centre, made up of such parts as a

8、rithmetic unit and controller , etc. The arithmetic unit can carry on 8 persons of arithmetic operation and unit ALU of logic operation while including one, the 1 storing device temporaries of 8, storing device 2 temporarily, 8's accumulation device ACC, register B and procedure state register P

9、SW, etc. Person who accumulate ACC count by 2 input ends entered of checking etc. temporarily as one operation often, come from person who store 1 operation is it is it make operation to go on to count temporarily , operation result and loop back ACC with another one. In addition, ACC is often regar

10、ded as the transfer station of data transmission on 8051 inside. The same as general microprocessor, it is the busiest register. Help remembering that agreeing with a express in the order. The controller includes the procedure counter, the order is deposited, the order deciphering, the oscillator an

11、d timing circuit, etc. The procedure counter is made up of counter of 8 for two, amounts to 16. It is a byte address counter of the procedure in fact, the content is the next IA that will carried out in PC. The content which changes it can change the direction that the procedure carries out. Shake t

12、he circuit in 8051 one-chip computers, only need outer quartz crystal and frequency to finely tune the electric capacity, its frequency range is its 12MHZ of 1.2MHZ. This pulse signal, as 8051 basic beats of working, namely the minimum unit of time. 8051 is the same as other computers, the work in h

13、armony under the control of the basic beat, just like an orchestra according to the beat play that is commanded.There are ROM (procedure memory , can only read ) and RAM in 8051 slices (data memory, can is it can write ) two to read, they have each independent memory address space, dispose way to be

14、 the same with general memory of computer. Procedure 8051 memory and 8751 slice procedure memory capacity 4KB, address begin from 0000H, used for preserving the procedure and form constant. Data 8051- 8751 8031 of memory data memory 128B, address false 00FH, using for middle result to deposit operat

15、ion, the data are stored temporarily and the data are buffered. In RAM of this 128B, there is unit of 32 bytes that can be appointed as the job register, this and general microprocessor is different, 8051 slice RAM and job register rank one formation the same to arrange the location. It is not very

16、the same that the memory of MCS-51 series one-chip computer and general computer disposes the way in addition. General computer for first address space, ROM and RAM can arrange in different space within the range of this address at will, namely the addresses of ROM and RAM, with distributing differe

17、nt address space in a formation. While visiting the memory, corresponding and only an address Memory unit, can ROM, it can be RAM too, and by visiting the order similarly. This kind of memory structure is called the structure of Princeton. 8051 memories are divided into procedure memory space and da

18、ta memory space on the physics structure, there are four memory spaces in all: The procedure stores in one and data memory space outside data memory and one in procedure memory space and one outside one, the structure forms of this kind of procedure device and data memory separated form data memory,

19、 called Harvard structure. But use the angle from users, 8051 memory address space is divided into three kinds: (1) In the slice, arrange blocks of FFFFH, 0000H of location, in unison outside the slice (use 16 addresses). (2) The data memory address space outside one of 64KB, the address is arranged

20、 from 0000H 64KB FFFFH (with 16 addresses) too to the location. (3) Data memory address space of 256B (use 8 addresses). Three above-mentioned memory space addresses overlap, for distinguishing and designing the order symbol of different data transmission in the instruction system of 8051: CPU visit

21、 slice, ROM order spend MOVC , visit block RAM order uses MOVX outside the slice, RAM order uses MOV to visit in slice.8051 one-chip computer have four 8 walk abreast I/O ports, call P0, P1, P2 and P3. Each port is 8 accurate two-way mouths, accounts for 32 pins altogether. Every one I/O line can be

22、 used as introduction and exported independently. Each port includes a latch (namely special function register), one exports the driver and a introduction buffer. Make data can latch when outputting, data can buffer when making introduction, but four function of pass away these self-same. Expand amo

23、ng the system of memory outside having slice, four ports these may serve as accurate two-way mouth of I/O in common use. Expand among the system of memory outside having slice, P2 mouth see high 8 address off; P0 mouth is a two-way bus, send the introduction of 8 low addresses and data / export in t

24、imesharing The circuit of 8051 one-chip computers and four I/O ports is very ingenious in design. Familiar with I/O port logical circuit, not only help to use port correctly and rationally, and will inspire to designing the peripheral logical circuit of one-chip computer to some extent. Load ability

25、 and interface of port have certain requirement, because output grade, P0 of mouth and P1 end output, P3 of mouth grade different at structure, so, the load ability and interface of its door demand to have nothing in common with each other. P0 mouth is different from other mouth, its output grade dr

26、aws the resistance supremely. When using it as the mouth in common use, output grade is it leak circuit to turn on, is it urge NMOS draw the resistance on taking to be outer with it while inputting to go out to fail. When being used as introduction, should write"1" to a latch first. Every

27、one with P0 mouth can drive 8 Model LS TTL load to export. P1 mouth is an accurate two-way mouth too, used as I/O in common use. Different from P0 mouth output of circuit its, draw load resistance link with power on inside have. In fact, the resistance is that two effects are in charge of FET and to

28、gether: One FET is in charge of load, its resistance is regular. Another one can is it lead to work with close at two state, make its President resistance value change approximate 0 or group value heavy two situation very. When it is 0 that the resistance is approximate, can draw the pin to the high

29、 level fast; when resistance value is very large, P1 mouth high electricity at ordinary times, can is it draw electric current load to offer outwards, draw electric current load to offer outwards, draw the resistance on needn't answer and thinking. Here when the port is used as introduction, mus

30、t write into 1 to the corresponding latch first too, make FET end relatively about 20,000 ohms because of load resistance in scene and because 40,000 ohms, will not exert an influence on the data that are input. The structure of P2 some mouth is similar to P0 mouth, there are MUX switches. Is it sim

31、ilar to mouth partly to urge, but mouth large a conversion controls some than P1.P3 mouth one multi-functional port, mouth getting many than P1 it have "3 doors and 4 buffers". Two parts there, make her besides accurate two-way function with P1 mouth just, can also use the second function

32、of every pin, "and" door 3 functions one switch in fact, it determines to be to output data of latch to output second signal of function. Act as W=At 1 o'clock, output Q end signal; act as Q=At 1 o'clock, can output W line signal. At the time of programming, it is that the first fu

33、nction is still the second function but needn't have software that set up P3 mouth in advance .It hardware not inside is the automatic to have two function outputted when CPU carries on SFR and seeks the location to visit to P3 mouth/at not lasting lining, there are inside hardware latch Qs=1. T

34、he operation principle of P3 mouth is similar to P1 mouth.Output grade, P3 of mouth, P1 of P1, connect with inside have load resistance of drawing, every one of they can drive 4 Model LS TTL load to output. As while inputting the mouth, any TTL or NMOS circuit can drive P1 of 8051 one-chip computers

35、 as P3 mouth in a normal way. Because draw resistance on output grade of them have, can open a way collector too or drain-source resistance is it urge to open a way, do not need to have the resistance of drawing outer. Mouths are all accurate two-way mouths too. When the conduct is input, must write

36、 the corresponding port latch with 1 first. As to 80C51 one-chip computer, port can only offer milliampere of output electric currents, is it output mouth go when urging one ordinary basing of transistor to regard as, should contact a resistance among the port and transistor base, in order to the el

37、ectricity while restraining the high level from exporting P1P3 Being restored to the throne is the operation of initializing of an one-chip computer. Its main function is to turn PC into 0000H initially, make the one-chip computer begin to hold the conduct procedure from unit 0000H. Except that the

38、ones that enter the system are initialized normally, as because procedure operate it make mistakes or operate there aren't mistake, in order to extricate oneself from a predicament , need to be pressed and restored to the throne the key restarting too. It is an input end which is restored to the

39、 throne the signal in 8051 China RST pin. Restore to the throne signal high level effective, should sustain 24 shake cycle (namely 2 machine cycles) the above its effective times. If 6 of frequency of utilization brilliant to shake, restore to the throne signal duration should exceed 4 delicate to f

40、inish restoring to the throne and operating. Produce the logic picture of circuit which is restored to the throne the signal: restore to the throne the circuit and include two parts outside in the chip entirely. Outside that circuit produce to restore to the throne signal (RST) hand over to Schmitt&

41、#39;s trigger, restore to the throne circuit sample to output , Schmitt of trigger constantly in each S5P2 , machine of cycle in having one more , then just got and restored to the throne and operated the necessary signal inside. Restore to the throne resistance of circuit generally, electric capaci

42、ty parameter suitable for 6 brilliant to shake, can is it restore to the throne signal high level duration greater than 2 machine cycles to guarantee. Being restored to the throne in the circuit is simple, its function is very important. Pieces of one-chip computer system could normal running, shoul

43、d first check it can restore to the throne not succeeding. Checking and can pop one's head and monitor the pin with the oscilloscope tentatively, push and is restored to the throne the key, the wave form that observes and has enough range is exported (instantaneous), can also through is it resto

44、re to the throne circuit group holding value carry on the experiment to change.MCS-51系列单片机的功能和结构MSC-51系列单片机具有一个单芯片电脑的结构和功能，它是英特尔公司的系列产品的名称。这家公司在1976年推出后，引进8位单芯片的MCS-48系列计算机后于1980年推出的8位的MCS-51系列单芯片计算机。诸如此类的单芯片电脑有很多种，如8051，8031，8751，80C51BH,80C31BH等，其基本组成，基本性能和指令系统都是相同的。8051是51系列单芯片电脑的代表。一个单芯片的计算机是由以下

45、几个部分组成：（1）一个8位的微处理器（CPU）。（2）片内数据存储器RAM（128B/256B）,它只读/写数据，如结果不在操作过程中，最终结果要显示数据（3）程序存储器ROM/EPROM(4KB/8KB).是用来保存程序一些初步的数据和切片的形式。但一些单芯片电脑没有考虑ROM/EPROM,如8031，8032，80C51等等。（4）4个8路运行的I/O接口，P0，P1，P2，P3，每个接口可以用作入口，也可以用作出口。（5）两个定时/计数器， 每个定时方式也可以根据计算结果或定时控制实现计算机。（6）5个中断（7）一个全双工串行的I/UART（通用异步接收器I口/发送器（UART），它是

46、实现单芯片电脑或单芯片计算机和计算机的串行通信使用。（）振荡器和时钟产生电路，需要考虑石英晶体微调能力。允许振荡频率为12MHz，每个上述的部分都是通过内部数据总线连接。其中CPU是一个芯片计算机的核心，它是计算机的指挥中心，是由算术单元和控制器等部分组成。算术单元可以进行位算术运算和逻辑运算，ALU单元是其中一种运算器，18个存储设备，暂存设备的积累设备进行协调，程序状态寄存器PSW积累了2个输入端的计数等检查暂时作为一个操作往往由人来操作，谁储存1输入的是它使操作去上暂时计数，另有一个操作的结果，回环协调。此外，协调往往是作为对8051内的数据传输转运站考虑。作为一般的微处理器，解码的顺序

47、。振荡器和定时电路等的程序计数器是一个由8个计数器为2，总计16位。这是一个字节的地址，其实程序计数器，是将在个人电脑内进行。从而改变它的内容可以改变它的程序进行。在8051的单芯片电脑的电路，只需要外部石英晶体和频率微调电容，其频率范围为1.2MHz到12MHz。这种脉冲信号，作为8051的工作，即单位时间的最低基本节奏。8051是其他电脑一样，控制的基本工作在于和谐，就像一个管弦乐队，根据击败发挥是指挥。有光盘（程序存储器，只能读取），并在8051片（数据存储器RAM，可以是可写可读，他们各自独立的内存地址空间，处理办法是，与一般的电脑记忆体相同。8051可8751的程序存储的存储容量4K

48、B的程序切片，地址开始从0000H开始执行，维护的程序和形式不断使用。数据8051-8751的内存数据存储器128B）条8031，地址虚假00FH，中层结果存入操作使用，数据存储和数据暂时缓冲等。在这128B条内存，有32字节，可以作为工作寄存器使用，这和一般的微处理器是不同的，8051片RAM和登记形式的同一级到安排的位置。这不是很相同，MCS-51系列内存的单芯片计算机和通用计算机为主。通用计算机的第一个地址空间，ROM和RAM,可安排在不同的空间在这个范围内的地址范围，即ROM和RAM 地址的形成与分布在不同的地址空间。在访问内存，相应的，只有一个地址的内存单元，可以用外部存储，也可以内

49、存，并通过访问顺序与此类似。这种内存结构的一种被称为普林斯顿结构。8051记忆分为程序存储器空间和数据存储空间的物理结构上划分，有四个在所有的记忆体空间。在1和数据外部数据存储器和程序存储器空间之一，一组在外面一个内存空间的程序商店，结构这一种形式的程序和数据存储器器件数据存储分开的形式，称为哈佛结构。但是，从用户使用，8051的内存地址空间分为三种：分为（1）片内，（使用16个地址一致的FFFFH，地点为0000H）。（2）64KB的外部数据存储器空间的一个地址，该地址是从0000H开始执行64KB的FFFFH安排16地址，也到该位置。（3）数据存储器的256B（使用8个地址）的地址空间。上

50、述三个内存空间的地址重叠，区分和设计的8051指令系统中不同的数据传输顺序代码，CPU的访问片，访问RAM块顺序使用MOVX指令外片，内存为访问片。8051单芯片的电脑有4个8步行并进的I/O端口，分别为P0,P1,P2和P3。每个端口8位的双向口，共占了32针。每一个I/O线可作为独立的入口和出口。每个端口包括一个锁存器，1名入口和一出口引进缓冲区。使数据能锁存输出时，数据缓冲区时，可以引进，但4个通道这些自我相同的功能。系统中的内存片展开外来的，这四个港口可作为准确的双向的I/O共同使用的输出口。系统的内存中展开外来的片，P2口处于高位，8地址关闭；入口P0口是双向总线，发送地址和8个低数据。